An analog CMOS four quadrant current-mode multiplier for low power artificial neural networks implementation

A CMOS four-quadrant analog multiplier circuit for neural networks integrated circuit implementation is presented. By applying differential balanced current mode signals (both for the input, output and weight signals) the multiplication function is easily implemented through two translinear loops. The multiplier exhibits low power consumption (the dc current is 250 nA under a differential power supply at 1.25 V), -3 dB bandwidth at 1.0 MHz and a small area (about 40 m 40 m) using a CMOS 0.8 m minimum channel length technology. Due to its modularity, low power consumption and scalability the multiplier can be easily integrated as a module in a large system.